Authors: Keenan Faulkner
Mentors: Jeff Goeders
Insitution: Brigham Young University
FPGAs are a type of reconfigurable computing chip that are often used in mission critical systems in various applications including aerospace, defense, and telecommunications. Hardware netlists are generally converted into a bitstream and loaded onto an FPGA board through vendor-provided tools. Due to the proprietary nature of these tools, it is up to the designer to trust the validity of the design's conversion to bitstream. However, motivated attackers may alter the CAD tools' integrity or manipulate the stored bitstream with the intent to disrupt the functionality of a design.
We have put forward a novel approach to verify functional equivalence between a synthesized netlist and the produced FPGA bitstream using a structural comparison algorithm. This presentation aims to demonstrate the fault-injection testing algorithms designed to prove the veracity of our approach. The fault-injection testing algorithms involve making manipulations to wire connections and initialization values in LUTs (lookup tables) from a bitstream reversed netlist, then running our comparison algorithms on the corrupted netlist and the original synthesized netlist to show that the algorithms will catch the errors.